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The xsynth-dssi package contains the Xsynth-DSSI plugin, a classic-analog (VCOs-VCF-VCA) style software synthesizer with an editor GUI. Xsynth-DSSI was written by Sean Bolton, and was based on Steve Brooke's Xsynth code, but has since acquired polyphonic operation, band-limited oscillators, a better filter mode, and velocity-sensitive envelopes.

This benchmark application is designed to benchmark interactivity in Unix, originally written by Con Kolivas et al. for Linux. It is designed to measure the effect of changes in operating system kernel design or system configuration changes such as CPU, I/O scheduler and file system changes and options. With careful benchmarking, different hardware can be compared.

Framework to benchmark PHP scripts or function calls.

Bowtie is an ultrafast, memory-efficient short read aligner. It aligns short DNA sequences (reads) to the human genome at a rate of over 25 million 35-bp reads per hour.

BWA is a program for aligning sequencing reads against a large reference genome (e.g. human genome). It has two major components, one for read shorter than 150bp and the other for longer reads.

python-nexus is a generic nexus (phylogenetics) file format(.nex, .trees) reader for python.

GHDL is the leading VHSIC Hardware Description Language (VHDL) simulator. Digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits can be described by VHDL, and VHDL can also be used as a general purpose parallel programming language. GHDL compiles VHDL files and creates a binary which simulates the design. GHDL fully supports IEEE 1076-1987, IEEE 1-76-1993, IEEE 1076-2002 versions of VHDL, and partially IEEE 1076-2008.

A IC/MEMS layout editor. Features: all angle, font generator, macros, boolean operations, design rule checker, crossplatform compatible, supported formats:Calma GDSII, OASIS (Open Artwork System Interchange Standard), DXF, CIF (Caltech Intermediate Form)

ems-flasher is software for flashing the EMS Gameboy USB 64 MBit cart.

This library package provides several forward error correction (FEC) decoders and accelerated primitives useful in digital signal processing (DSP). Except for the Reed-Solomon codecs, these functions take full advantage of the MMX, SSE and SSE2 SIMD instruction sets on Intel/AMD IA-32 processors and the Altivec/VMX/Velocity Engine SIMD instruction set on the G4 and G5 PowerPC. The library includes Viterbi decoders for the following convolutional codes: rate 1/2 k=7 rate 1/2 k=9 rate 1/6 k=15 ("Cassini") plus two Reed-Solomon encoder-decoders: one optimized for the (255,223) CCSDS standard code a general purpose encoder/decoder for arbitrary RS codes and three low-level 16-bit DSP support routines: signed dot product peak detection sum-of-squares (energy) computation This library is licensed under the "lesser" GNU General Public License.